? 2013 littelfuse, inc. specifcations are subject to change without notice. revised: 04/24/13 description features ? an array of 4 scr/diode pairs in 6-lead sot-23 ? esd capability per hbm standards - iec 61000-4-2, direct discharge .......... 8kv (level 4) - iec 61000-4-2, air discharge ............... 15kv (level 4) - mil std 3015.7 ................................................ >8kv ? input protection for applications with power supplies up to +20v (single-ended voltage), and 10v (differential voltage) ? peak current capability - iec 61000-4-5 (8/20s) ....................................... 3a - single pulse, 100s pulse width ..................... 2.2a ? low input leakage .......................................... 1na typical ? low input capacitance ..................................... 3pf typical ? operating temperature range .................... -40oc to 105oc applications the sp724 is a quad array of transient voltage clamping circuits designed to suppress esd and other transient over- voltage events. the sp724 is used to help protect sensitive digital or analog input circuits on data, signal, or control lines operating on power supplies up to 20vdc. the sp724 is comprised of bipolar scr/diode structures to protect up to four independent lines by clamping transients of either polarity to the power supply rails. the sp724 offers very low leakage (1na typical) and low input capacitance (3pf typical). additionally, the sp724 is rated to withstand the iec 61000-4-2 esd specifcation for both contact and air discharge methods to level 4. the sp724 is connected to the sensitive input line and its associated power supply lines. clamping action occurs during the transient pulse, turning on the diode and fast triggering scr structures when the voltage on the input line exceeds one v be threshold above the v+ supply (or one v be threshold below the v- supply). therefore, the sp724p operation is unaffected by poor power supply regulation or voltage fuctuations within its operating range. ? microprocessor/logic input protection ? data bus protection ? analog device input protection ? voltage clamp pinout functional block diagram no tes: 1. t he design of the sp724 scr/diode esd p rotection arra ys are co ve red by lit telfuse patent 456750 0. 2. t he full esd capabilit y of the sp724 is ac hieved when wired in a circuit that includes connection to both the v+ and v- pins. when handling individual de vices, f ollo w proper procedures f or electrost atic disc harge. 2 v+ v- in 3, 4 and 6 in 1 5 i/o i/o v+ i/o i/o v? 65 4 12 3 sp724 (sot-23) top view notes: 1. the design of the sp724 scr/diode esd protection arrays are covered by littelfuse patent 4567500. 2. the full esd capability of the sp724 is achieved when wired in a circuit that includes connection to both the v+ and v- pins. when handling individual devices, follow proper procedures for electrostatic discharge. life support note: not intended for use in life support or life saving applications the products shown herein are not designed for use in life sustaining or life saving applications unless otherwise expressly indicated. rohs pb green sp724 series 3pf 8kv diode array additional information datasheet samples resources tvs diode arrays (spa ? diodes) general purpose esd protection - sp724 series
? 2013 littelfuse, inc. specifcations are subject to change without notice. revised: 04/24/13 absolute maximum ratings parameter rating units continuous supply voltage, (v+) - (v-) +20 v forward peak current, i in to v cc , gnd (refer to figure 5) 2.2, 100s a electrical characteristics t a = -40 o c to 105 o c, v in = 0.5v cc , unless otherwise specifed thermal information parameter rating units thermal resistance (typical, note 3) ja o c/w sot package 220 o c/w maximum storage temperature range -65 to 150 o c maximum junction temperature 150 o c maximum lead temperature (soldering 20-40s) (sot - lead tips only) 260 o c caution: stresses above those listed in absolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specifcation is not implied. note: 3. ja is measured with the component mounted on an evaluation pc board in free air. parameter symbol test conditions min typ max units operating voltage range, v supply = [(v+) - (v-)] (notes 4, 5) v supply 1 - 20 v forward voltage drop forward voltage drop in to v- v fwdl i in = 1a (peak pulse) - 2 - v in to v+ v fwdh - 2 - v input leakage current i in -10 1 10 na quiescent supply current i quiescent v+ = 20v, v- = gnd - - 100 na equivalent scr on threshold (note 6) - 1. 1 - v equivalent scr on resistance v fwd /i fwd (note 6) - 1. 0 - input capacitance c in - 3 - pf notes: 4. in automotive and other battery charging systems, the sp724 power supply lines should be externally protected for load dump and reverse battery. when the v+ and v- pins are connected to the same supply voltage source as the device or control line under protection, a current limiting resistor should be connected in series between the external supply and the sp724 supply pins to limit reverse battery current to within the rated maximum limits. 5. bypass capacitors of typically 0.01f or larger should be connected closely between the v+ and v- pins for all applications. 6. refer to the figure 3 graph for defnitions of equivalent scr on threshold and scr on resistance. these characteristics are given here for information to determine peak current and dissipation under eos conditions. note: esd ratings and capability - see figure 1, table 1 typical application of the sp724 +v cc input driver s sp724 input pr o tection circuit (1 of 4 sho wn) or signal sources in 1, 3, 4 and 6 sp724 v- to +v cc linear or digit al ic interf ac e v+ +v cc 0.0 0 1f figure 4. t ypical applica tion of the sp724 as an input clamp for o ver-v olta ge, grea ter than 1v be abo ve v+ or less than -1v be bel ow v- application as an input clamp for over-voltage, greater than 1v be above v+ or less than -1v be below v-) tvs diode arrays (spa ? diodes) general purpose esd protection - sp724 series
? 2013 littelfuse, inc. specifcations are subject to change without notice. revised: 04/24/13 esd capability esd rating is dependent on the defned test standard. the evaluation results for various test standards and methods based on figure 1 are shown in table 1.3 the sp724 has a level 4 rating when tested to the iec 61000-4-2 human body model (hbm) standard and connected in a circuit in which the v+ and v- pins have a return path to ground. level 4 specifes a required capability greater than 8kv for direct discharge and greater than 15kv for air discharge. the modifed mil-std-3015.7 condition is defned as an in-circuit method of esd testing, the v+ and v- pins have a return path to ground.the sp724 esd capability is greater than 8kv with 100pf discharged through 1.5k. by strict defnition of the standard mil-std-3015.7 method using pin-to-pin device testing, the esd voltage capability is greater than 2kv. for the sp724 eiaj ic121 machine model (mm) standard, the esd capability is typically greater than 1.8kv with 200pf discharged through 0k. the charged device model is based upon the self- capacitance of the sot-23 package through 0k. standard type/mode r d c d v d iec 61000-4-2 (level 4) hbm, air discharge 330 150pf 15kv hbm, direct discharge 330 150pf 8kv mil-std-3015.7 modifed hbm 1.5k 100pf 8kv ? standard hbm 1.5k 100pf 2kv eiaj ic121 machine model 0k 200pf 400v us esd ds 5.3 charged device model 0k na 3kv h.v . suppl y v d in dut c d r 1 iec 1 000-4-2: r 1 50 to 10 0m r d charge switch discharge switch mil s td 30 15.7: r 1 1 to 10 m figure 1. electr os ta tic discharge tes t ?upper limit of laboratory test set. 60 08 00 1 000 12 00 20 0 16 0 12 0 80 40 0 single pulse t a = 25c for w ard scr vo lta ge drop (mv) for w ard scr current (ma) 5 4 3 2 1 0 t a = 25c single pulse equiv . sa t. on threshold ~ 1 .1v fo rw ar d scr vo lt ag e dr op (v ) 01 23 forw ard scr current (a) 60 08 00 1 000 12 00 20 0 16 0 12 0 80 40 0 single pulse t a = 25c for w ard scr vo lta ge drop (mv) for w ard scr current (ma) 5 4 3 2 1 0 t a = 25c single pulse equiv . sa t. on threshold ~ 1 .1v fo rw ar d scr vo lt ag e dr op (v ) 01 23 forw ard scr current (a) figure 1: electrostatic discharge test table 1: esd test conditions figure 3: high current scr forward voltage drop curve figure 2: low current scr forward voltage drop curve tvs diode arrays (spa ? diodes) general purpose esd protection - sp724 series
? 2013 littelfuse, inc. specifcations are subject to change without notice. revised: 04/24/13 peak transient current capability for long duration surges the peak transient current capability is inversely proportional to the width of the current pulse. testing was done to fully evaluate the sp724s ability to withstand long duration current pulses using the circuit of figure 4. figure 5 shows the point of overstress as defned by increased leakage in excess of the data sheet published limits. the safe operating range of the transient peak current should be limited to no more than 75% of the measured overstress level for any given pulse width as shown in the curve of figure 5. the test circuit of figure 4 is shown with a positive pulse input. for a negative pulse input, the (-) current pulse input goes to an sp724 in input pin and the (+) current pulse input goes to the sp724 v- pin. the v+ to v- supply of the sp724 must be allowed to foat. (i.e., it is not tied to the ground reference of the current pulse generator.) note that two input pins of the sp724 may be paralleled to improve current (and esd) capability. the sustained peak current capability is increased to nearly twice that of a single pin. figure 5. t ypical sp724 peak current tes t circuit with a v ariable pulse width input + - current sense vo lt ag e pr obe + - r 1 ~ 10 t ypical sp724 v x v x ad j. 1 0v/a t ypical r 1 (-) (+) c1 ~ 10 0 f c 1 v ariable time dura tion current pulse genera to r 123 654 0.0 01 0.0 1 0.1 1 10 7 6 5 4 3 2 1 0 10 0 1 000 8 squ are wa ve pulse width (ms) peak current (a) no te: to ensure safe opera tion limit the maximum peak current for a given pulse width to be no grea ter than 75% of the v alues sho wn. t a = 25oc v+ to v -suppl y = 15v showing the measured point of overstress in amperes vs pulse width time in milliseconds figure 5: sp724 typical nonrepetitive peak current pulse capability figure 4: typical sp724 peak current test circuit with a variable pulse width input tvs diode arrays (spa ? diodes) general purpose esd protection - sp724 series
? 2013 littelfuse, inc. specifcations are subject to change without notice. revised: 04/24/13 package dimensions small outline transistor plastic packages (sot23-6) ti me te mperature t p t l t s(max) t s(min) 25 t p t l t s time to peak temperature preheat p rehea t ramp-up r amp-up ramp-down r amp-d o critical zone t l to t p c ritical zo n e t l to t p refow condition pb C free assembly pre heat - temperature min (t s(min) ) 150c - temperature max (t s(max) ) 200c - time (min to max) (t s ) 60 C 180 secs average ramp up rate (liquidus) temp (t l ) to peak 5c/second max t s(max) to t l - ramp-up rate 5c/second max refow - temperature (t l ) (liquidus) 217c - temperature (t l ) 60 C 150 seconds peak temperature (t p ) 260 +0/-5 c time within 5c of actual peak temperature (t p ) 20 C 40 seconds ramp-down rate 5c/second max time 25c to peak temperature (t p ) 8 minutes max. do not exceed 260c soldering parameters notes: 1. dimensioning and tolerances per ansi 14.5m-1982. 2. package conforms to eiaj sc-74 (1992). 3. dimensions d and e1 are exclusive of mold fash, protrusions, or gate burrs. 4. footlenth l measured at reference to seating plane. 5. l is the length of fat foot surface for soldering to substrate. 6. n is the number of terminal positions. 7. controling dimension: millimeter. converted inch dimensions are not necessarily exact. package sot23-6 pins 6 jedec mo-178 millimeters inches notes min max min max a 0.900 1.450 0.035 0.057 - a1 0.000 0.150 0.000 0.006 - a2 0.900 1.300 0.035 0.051 - b 0.350 0.500 0.0138 0.0196 - c 0.080 0.220 0.0031 0.009 - d 2.800 3.000 0.11 0.118 3 e 2.600 3.000 0.102 0.118 - e1 1.500 1.750 0.06 0.069 3 e 0.95 ref 0.0374 ref - e1 1.9 ref 0.0748 ref - l 0.100 0.600 0.004 0.023 4,5 n 6 6 6 a 0o 10o 0o 10o - m 2.590 0.102 - o 0.690 .027 typ - p 0.990 .039 typ - r 0.950 0.038 - o p r m recommended solder p ad la y out tvs diode arrays (spa ? diodes) general purpose esd protection - sp724 series
? 2013 littelfuse, inc. specifcations are subject to change without notice. revised: 04/24/13 part numbering system lead plating matte tin lead material copper alloy lead coplanarity 0.004 inches (0.102mm) substitute material silicon body material molded epoxy flammability ul 94 v-0 product characteristics ordering information part number temp. range (oc) package marking min. order qty. SP724AHTG -40 to 105 tape and reel 724g 3000 embossed carrier tape & reel speci f cation sot23-6 8mm tape and reel general informa tion 1. 30 00 pieces per reel. 2. order in mul tiples of full reels onl y. 3. meets eia-481 revision "a" specifica tions. 2.0mm 4.0mm c l 1 .75mm 1 .5mm dia. hole 8mm 4.0mm 8.4mm 1 80mm 1 4.4mm 1 3mm 60mm a ccess hole cover t ape user direction of feed pin 1 so t -23 (8mm pocket pitch) pa c kage t ype t ape and r eel sp ah t ?green ? r ohs compliant g 724 ah: so t -23 series tvs diode arr ays (sp a ? diodes) notes: 1. all dimensions are in millimeters. 2. dimensions include solder plating. 3. dimensions are exclusive of mold fash & metal burr. 4. blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form. 5. package surface matte fnish vdi 11-13. tvs diode arrays (spa ? diodes) general purpose esd protection - sp724 series
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